1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device.
2. Description of the Related Art
To meet a demand for semiconductor integrated circuit devices that can operate at a higher speed, it is proposed that low dielectric constant insulating films should be used as interlayer insulating films. However, low dielectric constant insulating films are liable to peel off. It is therefore suggested that dummy patterns should be provided in any region having no wiring patterns or having wiring patterns formed at low density (see, for example, Jpn. Pat. Apply. KOKAI Publication No. 2004-79732).
However, no dummy patterns are provided in any region in which marks, such as alignment marks, are arranged, in order to securely recognize the mark. Inevitably, films are liable to peel off in the mark arrangement area.
Generally, no dummy patterns have been provided in the mark arrangement area. Hence, various problems, such as film peeling off, may arise.